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Semiconductor

Recruiting Semiconductor Professionals - Salary 30 Lakhs+Job Location : BangaloreExperience : 3 - 14 YearsEducation : B.Tech / M.TechClient : Product development MNC in Semiconductor domainPositions Opened1. ASIC Verification Engineer2. ASIC Design Engineer3. STA/Synthesis Engineer4. Physical Design EngineerInterested professionals please forward your resume to jobs@roljobs.com

  • Date Posted:  19-Nov-2014
  • Experience Level:  3 to 14 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area:   Not Specified
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA / Synthesis Experts

Experience : 3 - 10 YearsLocation : BangaloreBS or MS degree in EE or related with 3+ years working experience with top/block level timing closure (STA), timing closure methodologies.Ability to understand clock tree designsCo-work with RTL engineer and DFT engineer to consolidate modem subsystem timing constraints.Verify timing constraints with CCD.Analyze pre-layout and post-layout timing, develop timing ECOs, and work closely with layout engineers to achieve full chip timing closure.Good experience in EDA tools : PrimeTime, and CCD

  • Date Posted:  03-Nov-2014
  • Experience Level:  3 to 10 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  IT Software-System Programming
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

Lead Physical Design Engineer

Work Location : BangaloreEducational Qualification : B.Tech / M.Tech5 to 10 years of experience in Physical DesignSuccessful implementation of multimillion gate SoC designs in 65nm,45nm,32nm,28nm technologiesExpertise in using Synopsys ToolsShould be capable of handling block of 1M plus place able instancesHands on experience in complete Netlist to GDS implementation on high frequency designWork on all aspects of physical design including synthesis, IO ring creation, Bump placement , floor planning.Expertise in executing hierarchical designs - Floor planning, Partitioning, Budgeting, Integration and SignoffExpertise in Signoff - STA with Crosstalk and OCV, IR - Static and Dynamic, Physical Verification Closure.

  • Date Posted:  31-Oct-2014
  • Experience Level:  5 to 10 yrs
  • Industry:  IT-Hardware and Networking
  • Functional Area :  IT Hardware/Telecom/Technical Staff/Support
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

Hiring Place and Route Experts - MNC in Bangalore

Hiring Place and Route Experts - MNC in BangaloreYears of Experience : 4 – 8 yearsJob Location : Bangalore / TrivandrumRequired SkillsHands on Experience in place and route of multi-million gate ASIC or SoCsHands on Experience as digital backend lead for minimum of 10 multi-million gate ASICs.Excellent in STA, CTSExpertise in sub-micron CMOS technologiesExperience in Cross-talk Analysis, Power Analysis, Physical VerificationExcellent in Scripting languages such as Perl, ShellHands on Experience in Cadence or Synopsys flow

  • Date Posted:  03-Sep-2014
  • Experience Level:  4 to 8 yrs
  • Industry:  IT-Software/Software Services
  • Functional Area :  IT Product Development
  • Location:  Bangalore, Trivandrum
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA/Synthesis Expert @ Bangalore

Job Description:-Role: STA & Synthesis Technical LeadExperience : 5-15 YearsJob Location: BangaloreEducation : B.E/BS/B.Tech/MS/ME/M.TechResponsibilities & Skills required:Work independently and with teams in the areas of STA closure, clock tree synthesis.Experience in leading full-chip STA closure, defining mode requirements and corners for timing closureChip-level constraint development and constraint validation-Strong knowledge of clock tree synthesis, SI analysis,Strong understanding of ECO cycleAbility to collaborate and resolve issues adjoining timing-closure: delay-annotated gate-level-simulation, DFT timing, etc.Tcl/Perl scripting and automationEmail your resume to saku@roljobs.com

  • Date Posted:  23-Jul-2014
  • Experience Level:  5 to 15 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  IT Software-Embedded/EDA/VLSI/ASIC/Chip Design
  • Location:  Bangalore
  • Salary:  1500000 - 4000000
  • Job Type:  Permanent

Keywords:STA Synthesis

100% Match

STA Expert

Company : Product Development Company Experience : 5 - 15 yearsLocation : BangaloreResponsibilities :- Should have ability to understand clock tree designs- Co-work with RTL engineer and DFT engineer to consolidate modem subsystem timing constraints.- Verification of timing constraints with CCD.- Analyzing pre-layout and post-layout timing, development of timing ECOs.- Associate with layout engineers to achieve full chip timing closure.- To develop floor-planning and CTS guidelines for layoutExperience Required:-Hands on experience with top/block level timing closure (STA), timing closure methodologies.- Excellent work experience in PrimeTime and CCDProfessionals interested can send their updated resume to ahamed@roljobs.com

  • Date Posted:  04-Jul-2014
  • Experience Level:  5 to 15 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  Any
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA / Synthesis Specialist

Position: Back End Engineer in Wireless Communications Technology team (WCT)Job Location: BangaloreOnsite: Need to fly to Taiwan for 3 Months ImmediatelyEducation: Minimum BE / B.TechExperience: 2 -13 yearsSkills Required:Minimum 3 years working experience with top/block level timing closure (STA),timing closure methodologies.Hands on experience with EDA tools like PrimeTime, and CCDWell versed with tcl/ Perl script.

  • Date Posted:  23-Jun-2014
  • Experience Level:  2 to 13 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  IT Software-Embedded/EDA/VLSI/ASIC/Chip Design
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA & Synthesis Engineer (Sr. & Jr. Level)

STA & Synthesis Engineer (Sr. & Jr. Level)Job Role for STA & Synthesis EngineerJob Role: STA EngineerJob Type: Full Time/PermanentJob Location: Bangalore, IndiaIndustry Type: SemiconductorExperience Required: 2 to 15 YearsEducation: Bachelor's DegreeResponsibilities:Ability to understand clock tree designs.Co-work with RTL engineer and DFT engineer to consolidate modem subsystem timing constraints.Verify timing constraints with CCD.Analyze pre-layout and post-layout timing, develop timing ECOs, and work closely with layout engineers to achieve full chip timing closure.Job Profile for STA & Synthesis EngineerRequired Primary Skills:Minimum 3 years working experience with top/block level timing closure (STA), timing closure methodologies.Good experience in EDA tools : PrimeTime, and CCDWell versed with tcl / Perl script.Oracle Certification a plusNote: Mut be willing to travel to Taiwan for a Training session of 3Months.Salary: No constraint for the right candidates.Contact PersonAlisa TripathyCareer Analyst, Roland & AssociatesEmail id: alisa@roljobs.com

  • Date Posted:  21-Jun-2014
  • Experience Level:  2 to 15 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  Any
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA & Synthesis Engineer jobs in Bangalore

STA & Synthesis Engineer Job opportunity in BangaloreJob Description- Job Type: Full-Time positions- Job Role: STA & Synthesis Engineer- Industry: VLSI- Job Location: Bangalore, India- Job-Experience: 2 - 13 years- Graduation: B.Tech- Main Skill-sets: * STA & Synthesis- Salary: Competitive Pay Package!Those who wish to pursue this challenging STA & Synthesis Engineer Job opportunity, please send your updated resume with contact details immediately to maya@roljobs.comContact DetailsName: Maya NairE-Mail: maya@roljobs.comPhone: +91 804 282 1603

  • Date Posted:  20-Jun-2014
  • Experience Level:  2 to 13 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  Engineering Design/R&D
  • Location:  Bangalore
  • Salary:  Not Specified
  • Job Type:  Permanent
100% Match

STA Lead @ Bangalore

Job Description:-Role: STA& Synthesis Lead EngineerExperience : 7-10 YearsJob Location: BangaloreResponsibilities & Skills required:Work independently and with teams in the areas of STA closure, clock tree synthesis.Experience in leading full-chip STA closure, defining mode requirements and corners for timing closureChip-level constraint development and constraint validation- pre-layout and post-layoutStrong knowledge of clock tree synthesis, SI analysis, post-layout effects on timing analysisStrong understanding of ECO cycleAbility to collaborate and resolve issues adjoining timing-closure: delay-annotated gate-level-simulation, DFT timing, etc.Tcl/Perl scripting and automationMust have worked in at least five chip tape-outsWilling to handle a small team of engineers.Strong problem-solving skills and teamwork, Self-motivated, excellent verbal and written communicationEmail your resume to saku@roljobs.com

  • Date Posted:  14-Nov-2013
  • Experience Level:  6 to 10 yrs
  • Industry:  Semiconductors/Electronics
  • Functional Area :  IT Software-Embedded/EDA/VLSI/ASIC/Chip Design
  • Location:  Bangalore
  • Salary:  1500000 - 3000000
  • Job Type:  Permanent

Keywords:STA Synthesis

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